current "done" projects on OpenCores

[Kragen Javier Sitaker]

OpenCores is a free-software organization for hardware designs.

Below is a list from http://www.opencores.org/browse.cgi/by_category
--- it lists all the designs they have online now.  Briefly it
includes 16 arithmetic cores (including three variants of the FFT,
three multipliers, and a single-cycle unsigned divider), 11 prototype
boards, 31 communication controllers (covering serial, USB, Ethernet,
GPIO, HDLC, I2C, SPI, CAN, SPDIF, and a bunch of others), 11 crypto
cores (including RSA, DES, 3DES, AES128/192, Twofish), a DDR SDRAM
controller, 30 processors (at least one of which, the OpenRISC 1000,
runs Linux --- also including implementations of AVR and Z80), JPEG
compression, JTAG, a PS/2 interface, 11 systems-on-a-chip, a PCI
bridge, an IDE controller, and a VGA/LCD controller.

I think Axis also ships all the FPGA stuff from their cameras as free
software as well.

One implication of all this free-software hardware-design stuff is
that the relative advantage of including some FPGA space in a
general-purpose computer is gradually increasing.  If you could
transform your FPU into a fast integer FFT unit for one application,
and then a crypto core for another, and then JPEG compression for a
third, you might be better off than just having an FPU --- even at the
cost of making the FPU larger and slower.

For the most part, I think putting the CPU designs into an FPGA is a
silly thing to do.  Maybe an ASIC, but not an FPGA.  They use so much
FPGA space, and they run fairly slowly; you're much better off using a
purpose-built CPU to load stuff into the FPGA and run stuff that you
can't yet effectively accelerate with the FPGA.

(Perhaps some systems will trade CPU power for FPGA space --- perhaps
use an AVR or an RCA 1801 (that was the bit-serial processor all the
space missions and the COSMAC ELF used, wasn't it?) for the CPU to
control the FPGA, and run anything that needs to be fast in the FPGA.)

There's a virtuous cycle there similar to (and actually synergistic
with) the virtuous cycle I've been talking about for the last year
with multicore CPUs.  If FPGAs become more widely available in PCs,
people will write more software (is that the right word?) for them,
which will give more relative advantage to PCs incorporating FPGAs.
However, for the foreseeable future (four years?), the FPGAs will
still cost US$10 or more, so they won't find their way into low-end
cellphones and other small programmable computers.

For the "glue logic" stuff like USB and Ethernet, the advantage may
not be that great; I think you'll cause some communications problems
if you can turn your USB controller into an AES core for a while, then
turn it back; and the ability to turn it into an Ethernet controller
for a while, and then back into USB, isn't really helpful without both
connectors already present.  (And I think the Ethernet PHY needs funny
voltages and waveforms anyway, so you need specialized analog
circuitry.)

Here's the list:

 Arithmetic core
	CORDIC core
	5x4Gbps CRC generator designed with standard cells
	Single Clock Unsigned Division Algorithm
	Hardware Division Units
	radix 4 complex fft
	CF Cordic
	CF FFT
	CF Floating Point Multiplier
	Unsigned serial divider
	HCSA adder and Generic ALU based on HCSA
	PYRAMID Integer Multiplier unit
	HIERARCHICAL Integer Multiplier unit
	Binary to BCD conversions, with LED display driver
	FPU
	Discrete Cosine Transform core
	True matrix 3x3 color convertion

Prototype board
	Micro FPGA Board
	OCRP-1 board
	ACEX 1K50 board
	SD/MMC Bootloader
	MAXII-Evalboard
	IIE-PCI Board
	TI DSP and Xilinx FPGA Dev Board
	Ethernet Development Board
	Linux & Xilinx FPGA Dev Board
	kiss-board
	Technologic Systems TS-7300 FPGA Computer

Communication controller
	Ethernet MAC 10/100 Mbps
	General-Purpose I/O (GPIO) Core
	HDLC controller
	I2C controller core
	IrDA
	TDM controller
	Serial UART
	UART 16550 core
	USB 2.0 Function Core
	Stepper Motor Controller
	I2S Interface
	SPI controller core
	Reverse CDMA Access Channel Controller
	CAN Protocol Controller
	USB 1.1 PHY
	Simple Asynchronous Serial Controller
	Automatic BAUD rate generator
	Single Slot PCM Interface
	USB 1.1 Function IP Core
	SPI core
	HDB3/B3ZS Encoder+Decoder
	TIME SLOT INTERCHANGE DIGITAL SWITCH
	Quadrature Decoder / Counter
	SPDIF Interface
	SystemC USB1.1 IP Core
	USB 1.1 Host and Function IP core
	Manchester to UART converter
	SD/MMC Bootloader
	10_100_1000 Mbps tri-mode ethernet MAC
	a VHDL 16550 UART core
	8b10b Encoder/Decoder

Coprocessor
	Floating Point Unit
	CF Reconfigurable Computing Array
	FPU

Crypto core
	DES/Triple DES IP Cores
	128/192 AES
	SystemC/Verilog DES
	AES (Rijndael) IP Core
	Basic RSA Encryption Engine
	Basic DES Crypto Core
	SystemC/Verilog MD5
	AES128
	XTEA Crypto Core
	twofish 128/192/256
	AES core modules

DSP core
	Biquad IIR Filter Core
	Low Power FIR Filter
	CF FIR Filter
	FirGen/MultGen

ECC core
	Reed Solomon Encoder
	CF LDPC Decoder
	Ultimate CRC
	Reed-Solomon Decoder (31, 19, 6)

 Library
	Random Number Generator Library
	gh vhdl library
	extension_pack

Memory core
	Parameterisable DRAM model
	Memory cores
	Memory sizer
	Generic FIFOs
	DDR SDRAM Controller Core
	Single Port ASRAM
	CF Interleaver

Microprocessor
	Mini-Risc core
	Plasma - most MIPS I(TM) opcodes
	OpenRISC 1000
	aeMB
	Yellow Star
	RISC5x
	RISC Microcontroller
	T80 cpu
	T51 mcu
	risc16f84
	AX8 mcu
	PPX16 mcu
	TV80
	AVR Core
	ASPIDA sync/async DLX Core
	CF State Space Processor
	System09
	Aquarius
	AE18
	Cpu Generator
	System68
	16 Bit Microcontroller
	Data Flow Processor
	JOP: a Java Optimized Processor
	Wishbone High Performance Z80
	miniMIPS
	Educational RISC Processor
	YACC-Yet Another CPU CPU
	UCore
	T400 µController

Other
	SoC Debug Interface
	JTAG Test Access Port (TAP)
	PS2 interface
	PWM/Timer/Counter (PTC) Core
	boundaries
	SystemC/Verilog Random Number Generator
	Simple Programmable Interrupt Controller
	Simple General Purpose IO
	WB Interface for TI 5x DSP (WB2HPI)
	DragonBall/68K Wishbone interface
	Keypad Scanner
	First File Reader FAT16
	OpenRisc 1200 Graphic Configuration Tool
	SystemC to Verilog Synthesizable Subset Translator
	FPGA MMC-Card Config.
	JPEG Hardware Compressor
	Simple FM Receiver
	keyboardcontroller
	xmatchpro lossless data compressor
	Hardware looping unit

SoC
	WISHBONE DMA/Bridge IP Core
	WISHBONE Conmax IP Core
	WISHBONE Conbus IP Core
	Wishbone System6800/01
	Complete SoC based on C-NIT processor
	System09
	WISHBONE Builder
	WB/OPB & OPB/WB Interface Wrapper
	ahb system generator
	SimpCon - a Simple SoC Interconnect
	kiss-board

System controller
	AC 97 Controller IP Core
	OCIDEC (OpenCores IDE Controller)
	Memory Controller IP Core
	PCI bridge
	RS232 system controller
	TI DSP and Xilinx FPGA Dev Board

Video controller
	VGA/LCD Controller
	Video compression systems